This invention relates to numerically controlled oscillators, and more particularly, to multichannel memory-based numerically controlled oscillators for integrated circuits such as programmable logic devices.
Programmable logic devices are a type of integrated circuit that can be programmed by a user to implement a desired custom logic function. In a typical scenario, a logic designer uses computer-aided design (CAD) tools to design a custom logic circuit. These tools help the designer to implement the custom logic circuit using the resources available on a given programmable logic device. When the design process is complete, the CAD tools generate configuration data files. The configuration data is loaded into programmable logic devices to configure them to perform the desired custom logic function.
Programmable logic devices and other integrated circuits often contain numerically controlled oscillators. Numerically controlled oscillators are used to digitally synthesize functions such as sine and cosine functions. An advantage of numerically controlled oscillators over other types of digital oscillators is that they can be adjusted over a wide range of frequencies.
One type of numerically controlled oscillator uses a memory-based architecture. With this type of architecture, a desired output function is represented using values in a look-up table. A phase accumulator is used to produce a continuously incrementing memory address signal that is applied to the look-up table. The output of the look-up table is a digital representation of the desired output function. This digital output function may be converted to an analog signal for use in applications such as radio communications applications. A phase incrementer signal is applied to the input of the phase accumulator to adjust the frequency of the output function.
Multichannel numerically controlled oscillators may be used to produce output functions with different frequencies. For example, a two channel numerically controlled oscillator may be used to produce a sine function output at two different frequencies.
With one multichannel architecture, a time sharing approach is used to share a single phase accumulator and look-up table memory between each of the channels. Although this type of architecture uses memory resources efficiently, it requires the use of a faster clock rate for the phase accumulator and look-up table memory than would otherwise be required. In many situations this type of architecture may not be used, because the clock rate that would be required for the phase accumulator and memory exceeds the capabilities of these components.
It would therefore be desirable to be able to provide a multichannel numerically controlled oscillator that is capable of producing output signals at high frequencies while using memory resources efficiently.